Digital system clocking : high performance and low-power aspects / Vojin G. Oklobdzija, Vladimir M. Stojanovic, Dejan M. Markovic and Nikola M. Nedovic
Material type:
TextPublication details: New York : IEEE ; Hoboken, N.J. : Wiley-Interscience, c2003.Description: xv, 245 p. : ill. ; 25 cmISBN: - 9780471274476
- 047127447X (cloth)
- 621.3815 OKL-V 21
- TK7868.T5 D54 2003
| Item type | Current library | Collection | Shelving location | Call number | Status | Date due | Barcode | Item holds |
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BITS Pilani Hyderabad | 621 | General Stack (For lending) | 621.3815 OKL-V (Browse shelf(Opens below)) | Available | 41486 |
Digital System Clocking is assuming ever greater importance as clock speeds increase, doubling every three years. This—the first book to focus entirely on clocked storage elements, "Flip-Flops" or "Latches"—provides an in-depth introduction to the subject for both professional computer design engineers and graduate-level computer engineering students. In Digital System Clocking: High-Performance and Low-Power Aspects, you will find information on:
1. Clocking in synchronous systems including on-chip clock generation, timing parameters, and clock signal distribution
2. Latch-based and Flip-Flop derivation
3. Clock-to-output delay tcq
4. Pipelining and timing analysis
5. Absorbing clock uncertainties and dynamic time borrowing
Includes bibliographical references (p. 233-240) and index.
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